Agilent 16517A, 16518A Synchronous State Logic Analyzer

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Additional info for Agilent 16517A, 16518A Synchronous State Logic Analyzer (users)

Example text

The higher level editing, such as adding or deleting entire sequence levels, is done using the Modify Trigger field in the main Trigger menu. You can also enter any existing sequence level from the Modify Trigger field. Another way of editing a specific sequence level is to select the sequence level number field. Modify trigger Sequence level number Accessing Sequence Levels Once you are in any sequence level, you configure the sequence statement using predefined macro statements or user-defined statements.

The sample clock offset allows the offset of the internal sample clock from the external clock edge to ensure the sampling of valid data. Acquisition mode The Format Menu 3–2 The Format Menu Synchronous State Acquisition Mode Synchronous State Acquisition Mode The Acquisition Mode field is used to select the acquisition mode. The acquisition mode configures which clock source is used, the channel width, memory depth, and maximum sampling speed. State Mode Full Channel 1 GHz In State Mode Full Channel 1 GHz, both pods are available on all configured cards.

Assignment field Primary "Find" branch Secondary "else on" branch Sequence Level Menu The actual resource terms available for any particular assignment field varies on such things as the acquisition mode, if the timer or occurrence counter is used, and how many resource terms have already been used in other levels. See Also "The Trigger Sequencer" section in chapter 4, "Concepts," in the Agilent Technologies 16500/16501A Logic Analysis System User’s Guide. The User’s Guide is distinct from the User’s Reference and contains supplementary information.

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